Exciting Developments: Google Tensor G5 Insights
The tech world is buzzing with the recent specifications and benchmarks of Google’s upcoming Tensor G5, expected to debut with the Pixel 10 later this year. In a groundbreaking shift, Google will utilize TSMC’s 3nm-class process for the Tensor G5, moving away from its previous reliance on Samsung. This transition promises improved performance and efficiency, making the Tensor G5 a highly anticipated release.
According to a report from Android Authority, the Tensor G5 will feature a powerful PowerVR dual-core IMG DXT-48-1536 GPU, clocked at 1.1GHz, marking a significant upgrade from the Arm Mali GPU used previously. Additionally, Google is introducing a next-generation EdgeTPU and GXP DSP, while still incorporating its well-known Emerald Hill memory compressor and AoC audio processor.
For the first time, the Tensor G5 will come with a fully custom Google ISP, moving away from the Samsung ISP model. The device will also leverage the VeriSilicon DC9000 Display controller and Chips&Media WAVE677DV video codec, supporting advanced 4K120 encoding and decoding across formats like AV1, VP9, HEVC, and H.264. This is a noteworthy upgrade from the existing custom ‘BigWave’ AV1 video codec.
While the Tensor G5 will retain the Synopsys DesignWare USB3 for connectivity, Google has collaborated with various IP providers, including Synopsys and SmartDV Technologies. It’s anticipated that a third-party vendor will supply the UFS controller, although the specific vendor remains undisclosed.
Even with the switch to TSMC manufacturing, the Tensor G5 will largely mirror its predecessors, maintaining Google’s strategy of using limited custom components while relying on generic, externally sourced parts.
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